Semiconductor devices, or semiconductor integrated circuits, are designed with protection circuits to protect against undesired over-voltage or over-current conditions that often occur at the input/output pins or the power supply pins of an integrated circuit, causing permanent damage to the integrated circuit. Over-voltage or over-current conditions experienced by semiconductor devices can include electrical overstress (EOS) events or electrostatic discharge (ESD) events.
Electrical overstress describes an event whereby a semiconductor device is operated above its absolute maximum electrical rating as specified in its data sheet. When a semiconductor device is subjected to a current or voltage that is beyond the specified limits of the device, thermally induced damage results which can lead to permanent device failure. An EOS event occurs when the semiconductor device is operating and typically has a long time span, such as from a few microseconds to a few seconds. In general, EOS events are associated with moderately high voltage (e.g. less than 100V) and large peak current (e.g. greater than 10 A) that occur over a long time frame (e.g. greater than 1 ms).
Electrostatic discharge (ESD) is a related voltage overstress condition which can occur to a semiconductor device at rest or while operating. The discharge of static electricity from another body at the input/output pins or the power supply pins of a semiconductor device can lead to permanent device failure. ESD events typically have a very short duration, such as less than 1 microsecond, and typically have a duration in a nanoseconds range. In general, ESD events are associated with very high voltage (e.g. greater than 500V) and moderate peak current (e.g. 1A to 10A) that occur in a very short time frame (e.g. less than 1 μs).
Accordingly, integrated circuits are designed with protection circuits for preventing EOS and ESD events at the input/output/supply pins from reaching internal circuitry and causing permanent damages.
In particular, integrated circuit pins need protection from EOS events caused by pin to pin shorts as a result of human/machine handling or when the integrated circuit is being soldered on circuit board. Pin-to-pin shorts on an integrated circuit can occur due to solder creepage during manufacturing and subsequent temperature cycling. For instance, EOS protection is needed in a DC-DC converter integrated circuit where the high voltage power supply pin can get shorted to an adjacent low voltage pin, resulting in an EOS event that damages the input-output circuit of the DC-DC converter, including the ESD protection circuit that may be provided at the I/O pins. Because ESD events are of short duration, ESD protection circuits are often not designed to handle the extended high current excursion of an EOS event. The large current and extended time period of an EOS event often result in excessive heating of the integrated circuit, causing the molding compound of the integrated circuit to catch fire or smoke. In the case of power supply pin shorts in a DC-DC converter, the EOS event damages the low voltage I/O pin and not the high voltage supply pin as the high voltage supply pin is designed with high voltage protection circuit.
Conventional techniques to protect against EOS events include using a fuse in series with the pins to be protected. The fuse opens up during an EOS event, thereby stopping the EOS event and preventing fire or smoke from occurring. However, fuses cannot be used in series with input-output pins that carry high currents as the normally high current level at an input-output pin may cause the fuse to open, even in the absence of an EOS event. Furthermore, the fuse should be capable of sustaining an ESD pulse and not be become open by an ESD pulse so as to allow the ESD protection circuit to operate to protect the circuit. For high current input-output pins, a current limiting resistor is used in place of a fuse. Other conventional techniques for EOS protection include using high voltage protection circuit to low voltage power supply pins. However, high voltage protection circuits are larger in size and thus increase the size of the integrated circuit when high voltage protection circuits are used for the low voltage power supply pins.
FIG. 1A illustrates EOS/ESD protection circuits for an input-output (I/O) pin of a semiconductor integrated circuit in some examples. An I/O pin of an integrated circuit is connected to an I/O pad 1 on the semiconductor substrate of the integrated circuit. The I/O pad 1 may be connected to an EOS protection circuit in the form of a fuse 6 connected in series with the I/O pad. An ESD protection circuit formed by pn junction diodes D1 and D2 is provided on the other end of fuse 6. In particular, the fuse 6 is connected to the common node 5 of diodes D1 and D2 which are connected in series between the positive power supply voltage Vdd (node 2) and ground (node 4). The pn junction diodes D1 and D2 operate to shunt ESD spikes detected at the common node 5 to either the supply voltage Vdd or ground. In some cases, a supply voltage clamp circuit is also provided to protect the power supply voltage pin. In the present example, a zener diode D3 is coupled between the supply voltage Vdd and ground in reverse bias configuration to prevent the power supply voltage Vdd from exceeding a given voltage value. As thus configured, the fuse 6 provides protection against EOS event. However, an EOS protection circuit using a fuse cannot be used for high current I/O pins as the normally high operating current of the I/O pin may open fuse 6 in the absence of an EOS event.
FIG. 1B illustrates EOS/ESD protection circuits for an input-output (I/O) pin of an semiconductor integrated circuit in some examples. In the example shown in FIG. 2, a current limiting resistor 8 is used as the EOS protection circuit and is connected in series with I/O pad 1. Accordingly, the EOS protection circuit can be used with high current I/O pins. However, current limiting resistors are large in size and consume large silicon real estate.